報(bào)告題目：Architecture and Software Optimizations for Future Memory Technology
報(bào)告時(shí)間：2023年7月5日上午10:00
報(bào)告地點(diǎn)：437bwin必贏國際官網(wǎng)B405會(huì)議室
報(bào)告人：Jia Rao
報(bào)告人國籍：中國
報(bào)告人單位：德克薩斯大學(xué)阿靈頓分校
報(bào)告人簡介：Dr. Jia Rao is currently an Associate Professor in the Department of Computer Science and Engineering at the University of Texas at Arlington. His research lies broadly in the area of Operating Systems, Parallel and Distributed Computing, and Cloud Computing. His recent focus is on performance optimization and system support for emerging hardware devices and machine learning workloads. His work has been published in prestigious conferences, including EuroSys, USENIX ATC, HPCA, Supercomputing, PPoPP, HPDC, SoCC, ICDCS, and IPDPS. Highlights of Dr. Rao's research include a National Science Foundation (NSF) CAREER award, best paper awards at Middleware (2021), APSys (2016), ICAC (2013), and best paper nominations at HPCA (2013) and HPDC (2013). Dr. Jia Rao received his B.S. and M.S. degrees in Computer Science from Wuhan University in 2004 and 2006, respectively, and a Ph.D. degree in Computer Engineering from Wayne State University in 2011.
報(bào)告摘要：The rapidly increasing number of cores in modern processors and the difficulties in scaling DRAM-based main memory have led to a widening gap between processor and memory speeds. In this talk, I will discuss two recent trends to scale memory capacity vertically and horizontally. Vertical memory scaling explores new memory technologies, such as non-volatile memory, to increase memory capacity while providing the traditional byte-addressable programming interface in a DIMM package. Horizontal memory scaling seeks to decouple memory from the traditional memory bus through innovative interconnect technologies, e.g., Compute Express Link (CXL), to scale memory independently from the processor and allow for high-speed communication between CPUs and a wide range of memory devices, including DRAM, non-volatile memory, and accelerators. In this talk, I will discuss the challenges and opportunities in vertical and horizontal memory scaling and present our recent work on characterizing and optimizing the performance of Intel Optane persistent memory and tiered memory management.
邀請(qǐng)人：程大釗
